Investigation of an Extendable Multisource Switched-Capacitor Multilevel Inverter With Reduced Device Count

The article introduces a novel 17-level switched-capacitor multilevel inverter (SCMLI) that eliminates the need for an H-bridge circuit while significantly reducing the number of components involved. This innovative structure relies on two symmetric non-isolated sources and a capacitor leg (CL) composed of four capacitors arranged in series. Furthermore, an extended version of this 17-level structure has been devised, allowing for the incorporation of varying numbers of sources and capacitors. Notably, this extended configuration achieves the same number of output voltage levels as comparable structures but with a reduced requirement for switches, drivers, capacitors, and sources. In addition, the proposed structure requires to conduct only two semiconductor devices to charge capacitors directly from dc sources, enhancing capacitor voltage profiles. Also, by conducting just three switches to achieve the highest voltage level, it reduces parasitic voltage drops and increases the boosting factor. To incorporate modularity and enable the generation of higher output voltage levels, the article explores a cascaded configuration of the proposed extended SCMLI. This configuration is analyzed for both symmetric and asymmetric dc source arrangements. The article provides comprehensive insights into the construction of the circuit, its operating principles, voltage stress analysis, the procedure for selecting capacitors, inrush current analysis, and detailed power losses analysis for the proposed inverter. Finally, the performance of the proposed 17-level SCMLI is validated through experimentation on a laboratory prototype, demonstrating its efficacy under various load conditions. The proposed inverter achieves 94.4% efficiency at an output power of 213 W, with a total harmonic distortion (THD) of 6.21% in the output voltage.