Standard Cells with Inverted Inputs in 7nm Technology

This paper presents a method to determine which inverted input cells (IICs) should be included into a standard cell library designed with a 7 nm process technology. Standard cells with some inverted inputs not only could reduce the number of cells in a design but also possibly eliminate the area overhead (diffusion breaks) required for isolating the inverters from the standard cells without inverted inputs. Our experimental results show that employing a 7 nm standard cell library with 21 IICs derivedfrom only 8 master cells could save on average 8.4% cells and 2.8% total cell area per circuit without worsening timing performance.