A Low-Noise Fully-Differential Bandgap Reference for Low-Power High-Precision ADCs

This work presents the design of a fully-differential bandgap reference (BGR) with low noise and high load-driving capability for use with high-precision data converters. Noise minimization is achieved through careful optimizations of various devices and bias currents, while avoiding the use of dynamic circuit techniques to ensure a maximum loop bandwidth per a given bias current for high load-driving capability. Designed and simulated with $3.3-\mathrm{V}$ devices in a $0.13-\mu \mathrm{m}$ CMOS process, the BGR consumes $62 \mu \mathrm{~A}$ from a $3.3-\mathrm{V}$ supply and occupies an active area of $0.2 \mathrm{~mm}^{2}$, while providing the differential reference voltage of 2.048 V at $25^{\circ} \mathrm{C}$, with a temperature coefficient of 35.7 $\mathrm{ppm} /{ }^{\circ} \mathrm{C}$ over a range of -40 to $85^{\circ} \mathrm{C}$. With the proposed noise optimization method, the BGR achieves an excellent noise floor of $372 \mathrm{nV} / \sqrt{\mathrm{Hz}}$ with a $1 / f$ corner of 164 Hz.