Low-power and Small-area Transimpedance Amplifier with Active Inductor in 65 nm CMOS

This paper proposes a $25 \mathrm{Gbps}, 0.67 \mathrm{pJ} /$, bit inverter-based active-voltage current-feedback transimpedance amplifier (AVCF-TIA) circuit. The proposed TIA circuit has higher gain and wider bandwidth than the conventional AVCF-TIA circuit. In addition, the use of active inductors not only extends the bandwidth but also reduces the circuit area compared to the circuits using inductors. Post-layout simulation results show that the proposed TIA circuit has a transimpedance gain of $\mathbf{6 5. 0}$ $\mathrm{dB} \Omega$ and a bandwidth of 21.4 GHz. The proposed TIA circuit operates at a supply voltage of 1.0 V and consumes 16.8 mW $(=16.8 \mathrm{~mA} \times 1.0 \mathrm{~V})$. The area of the layout including I/O and DC pads is $670 \mu \mathrm{~m} \times 580 \mu \mathrm{~m}\left(=0.39 \mathrm{~mm}^{2}\right)$, and the area of the proposed TIA circuit is $\mathbf{1 8 5} \mu \mathrm{m} \times 170 \mu \mathrm{~m}\left(=0.031 \mathrm{~mm}^{2}\right)$.

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Publication Details

Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808573
Citations
1
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.21

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article

Low-power and Small-area Transimpedance Amplifier with Active Inductor in 65 nm CMOS

T. Masuda, Yasuhiro Takahashi
1 citations
Radio Frequency Integrated Circuit Design
0.21
article

Low-power and Small-area Transimpedance Amplifier with Active Inductor in 65 nm CMOS

T. Masuda, Yasuhiro Takahashi
article en
1 citations

Abstract

This paper proposes a $25 \mathrm{Gbps}, 0.67 \mathrm{pJ} /$, bit inverter-based active-voltage current-feedback transimpedance amplifier (AVCF-TIA) circuit. The proposed TIA circuit has higher gain and wider bandwidth than the conventional AVCF-TIA circuit. In addition, the use of active inductors not only extends the bandwidth but also reduces the circuit area compared to the circuits using inductors. Post-layout simulation results show that the proposed TIA circuit has a transimpedance gain of $\mathbf{6 5. 0}$ $\mathrm{dB} \Omega$ and a bandwidth of 21.4 GHz. The proposed TIA circuit operates at a supply voltage of 1.0 V and consumes 16.8 mW $(=16.8 \mathrm{~mA} \times 1.0 \mathrm{~V})$. The area of the layout including I/O and DC pads is $670 \mu \mathrm{~m} \times 580 \mu \mathrm{~m}\left(=0.39 \mathrm{~mm}^{2}\right)$, and the area of the proposed TIA circuit is $\mathbf{1 8 5} \mu \mathrm{m} \times 170 \mu \mathrm{~m}\left(=0.031 \mathrm{~mm}^{2}\right)$.

Gifu University (JP)
National Institute of Information and Communications Technology, Research and Development
Affordable and clean energy
Openalex Percentile: Top 44%
Radio Frequency Integrated Circuit Design
0.21
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Low-power and Small-area Transimpedance Amplifier with Active Inductor in 65 nm CMOS — T. Masuda, Yasuhiro Takahashi · (2024) | TGRS Research Map | TGRS