Low-power and Small-area Transimpedance Amplifier with Active Inductor in 65 nm CMOS
This paper proposes a $25 \mathrm{Gbps}, 0.67 \mathrm{pJ} /$, bit inverter-based active-voltage current-feedback transimpedance amplifier (AVCF-TIA) circuit. The proposed TIA circuit has higher gain and wider bandwidth than the conventional AVCF-TIA circuit. In addition, the use of active inductors not only extends the bandwidth but also reduces the circuit area compared to the circuits using inductors. Post-layout simulation results show that the proposed TIA circuit has a transimpedance gain of $\mathbf{6 5. 0}$ $\mathrm{dB} \Omega$ and a bandwidth of 21.4 GHz. The proposed TIA circuit operates at a supply voltage of 1.0 V and consumes 16.8 mW $(=16.8 \mathrm{~mA} \times 1.0 \mathrm{~V})$. The area of the layout including I/O and DC pads is $670 \mu \mathrm{~m} \times 580 \mu \mathrm{~m}\left(=0.39 \mathrm{~mm}^{2}\right)$, and the area of the proposed TIA circuit is $\mathbf{1 8 5} \mu \mathrm{m} \times 170 \mu \mathrm{~m}\left(=0.031 \mathrm{~mm}^{2}\right)$.
Authors
- T. Masuda (ORCID: https://orcid.org/0000-0003-1852-5967)
- Yasuhiro Takahashi (ORCID: https://orcid.org/0000-0002-1653-8425)
Institutions
- Gifu University (JP)
Publication Details
- Published
- 2024-11-07
- DOI
- https://doi.org/10.1109/apccas62602.2024.10808573
- Citations
- 1
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- National Institute of Information and Communications Technology
- Research and Development