Design of a Low-Power LNIA-ADC Interface Circuit in 22nm FDSOI for a Thermopile Sensor in Biomedical Application

This paper presents a design of a low-noise instrumentation amplifier (LNIA) and analog-to-digital converter (ADC) interface in 22 nm FDSOI for infrared (IR) sensingin biomedical applications. The LNIA is used as a signal conditioning block for a thermopile sensor input and utilizes a capacitively-coupled chopper instrumentation amplifier (CCIA) topology with a ripple reduction loop (RRL). The ADC adopts a successive approximation register (SAR) topology to digitize the signal from the LNIA with a power-gated counter D flip-flop array and a split binary weighted (SBW) capacitive digital-toanalog converter (CDAC). Schematic simulation shows that the interface circuitconsumes $1.65 \mu \mathrm{~W}$ of power and can output a digital signal that represents a data set from a temperature range of $25^{\circ} \mathbf{C}$ to $45^{\circ} \mathbf{C}$ with a step of 200 mK.

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Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808869
Primary Topic
Analytical Chemistry and Sensors
Type
article
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article

Design of a Low-Power LNIA-ADC Interface Circuit in 22nm FDSOI for a Thermopile Sensor in Biomedical Application

Arcel G. Leynes, Rafael Pangilinan, Maria Sophia Ralota, Maria Theresa de Leon et al.
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Analytical Chemistry and Sensors
article

Design of a Low-Power LNIA-ADC Interface Circuit in 22nm FDSOI for a Thermopile Sensor in Biomedical Application

Arcel G. Leynes, Rafael Pangilinan, Maria Sophia Ralota, Maria Theresa de Leon, John Richard E. Hizon, Marc Rosales, Jeremy David Molines, Zylm Sabater, Fergie John Frange, Eugene Imbang, Vincent Angelo Bogg's G. Roxas
article en

Abstract

This paper presents a design of a low-noise instrumentation amplifier (LNIA) and analog-to-digital converter (ADC) interface in 22 nm FDSOI for infrared (IR) sensingin biomedical applications. The LNIA is used as a signal conditioning block for a thermopile sensor input and utilizes a capacitively-coupled chopper instrumentation amplifier (CCIA) topology with a ripple reduction loop (RRL). The ADC adopts a successive approximation register (SAR) topology to digitize the signal from the LNIA with a power-gated counter D flip-flop array and a split binary weighted (SBW) capacitive digital-toanalog converter (CDAC). Schematic simulation shows that the interface circuitconsumes $1.65 \mu \mathrm{~W}$ of power and can output a digital signal that represents a data set from a temperature range of $25^{\circ} \mathbf{C}$ to $45^{\circ} \mathbf{C}$ with a step of 200 mK.

University of the Philippines Diliman (PH)
Affordable and clean energy
Openalex Percentile: Top 73%
Analytical Chemistry and Sensors
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Design of a Low-Power LNIA-ADC Interface Circuit in 22nm FDSOI for a Thermopile Sensor in Biomedical Application — Arcel G. Leynes, Rafael Pangilinan, et al. · (2024) | TGRS Research Map | TGRS