Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Modern integrated circuit (IC) production involves a complex supply chain with security risks like Trojans, physical probing or manipulation. We propose DEFense, an extensible computer-aided design (CAD) framework that aims for “security closure” at the physical-layout level, balancing security with traditional power, performance, and area (PPA) goals. DEFense automates vulnerability assessment for IC layouts, guiding CAD tools in adjusting placement, routing, and applying other defense methods. DEFense is offered to the community [1].

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Publication Details

Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808337
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
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Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Jayanth Gopinath, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu et al.
Integrated Circuits and Semiconductor Failure Analysis
article

Safeguarding the Silicon: Strategies for Integrated Circuit Layout Protection

Jayanth Gopinath, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Mohammed Ashraf, Jitendra Bhandari
article en

Abstract

Modern integrated circuit (IC) production involves a complex supply chain with security risks like Trojans, physical probing or manipulation. We propose DEFense, an extensible computer-aided design (CAD) framework that aims for “security closure” at the physical-layout level, balancing security with traditional power, performance, and area (PPA) goals. DEFense automates vulnerability assessment for IC layouts, guiding CAD tools in adjusting placement, routing, and applying other defense methods. DEFense is offered to the community [1].

New York University (US)
Openalex Percentile: Top 78%
Integrated Circuits and Semiconductor Failure Analysis
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