A Stochastic RMS Jitter Monitoring Circuit for Clock Generators using Central Limit Theorem

In this paper, we introduce a jitter monitoring circuit capable of measuring rms jitter of general clock generators with any jitter probability distribution. By employing the central limit theorem (CLT) to the measured jitter, a normal distribution can be achieved regardless of the original jitter distribution, and it allows the estimation of the rms jitter by using a simple pulse-width comparator, without the need for complex time-to-digital converters. The proposed jitter estimation scheme was verified in behavioral simulations, and the error in rms jitter accuracy was less than $\mathbf{1 0 \%}$ for more than $\mathbf{9 9. 5 \%}$ of the experimental trials when the number of samples exceeded 5000.