Design of Low-Power 6T Adiabatic PUF Circuit

The adiabatic based Physical Unclonable Functions (PUF) is a circuit that utilizes adiabatic technology and the variations in the CMOS manufacturing process to achieve low energy dissipation and enhance device security. In this paper, we propose a low-power 6T adiabatic PUF and simulated using 0.18 $\mu \mathrm{m}$ CMOS process technology. The simulation results show that the proposed PUF achieves an average reliability of $98.51 \%$ against variations of temperature and supply voltage, with a uniqueness of $49.75 \%$ and consumes $15.92 \mathrm{fJ} / \mathrm{Cb}-\mathrm{cycle}$ per bit. To validate the functionality of the proposed PUF, a 4-bit Low-Power 6T PUF chip is fabricated using $0.18 \mu \mathrm{~m}$ standard CMOS process. Measurement results show that the proposed PUF has normal PUF functionality and has an average reliability of $96.92 \%$ at room temperature.

Authors

Institutions

Publication Details

Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808318
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Design of Low-Power 6T Adiabatic PUF Circuit

Yasuhiro Takahashi, Jiaming Liu
Integrated Circuits and Semiconductor Failure Analysis
article

Design of Low-Power 6T Adiabatic PUF Circuit

Yasuhiro Takahashi, Jiaming Liu
article en

Abstract

The adiabatic based Physical Unclonable Functions (PUF) is a circuit that utilizes adiabatic technology and the variations in the CMOS manufacturing process to achieve low energy dissipation and enhance device security. In this paper, we propose a low-power 6T adiabatic PUF and simulated using 0.18 $\mu \mathrm{m}$ CMOS process technology. The simulation results show that the proposed PUF achieves an average reliability of $98.51 \%$ against variations of temperature and supply voltage, with a uniqueness of $49.75 \%$ and consumes $15.92 \mathrm{fJ} / \mathrm{Cb}-\mathrm{cycle}$ per bit. To validate the functionality of the proposed PUF, a 4-bit Low-Power 6T PUF chip is fabricated using $0.18 \mu \mathrm{~m}$ standard CMOS process. Measurement results show that the proposed PUF has normal PUF functionality and has an average reliability of $96.92 \%$ at room temperature.

Gifu University (JP)
Affordable and clean energy
Openalex Percentile: Top 78%
Integrated Circuits and Semiconductor Failure Analysis
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.