A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS
Many applications benefit from AI inference at the edge, in industry, agriculture and transportation domains. The observed trend in image/video analysis is to increase the resolution of sensors, thus increasing the need for powerful, yet ultra-low power and low-latency hardware solutions. In this paper, we explore a novel approach to meet these conflicting requirements and we propose a whole new class of accelerator: the Feature Extractor Accelerator (FEA). This solution enables processing up to HD images ($1280 \times 720$) at 30 frames per second (FPS), using a fraction of the energy of the actual image sensor: it consumes at most 23.2 mW, with a 6.9 ms latency, while reaching 70.42% accuracy on ImageNet. This approach combines two key principles: a feature extraction backbone and transfer learning technique.
Authors
- Ivan Miro-Panades (ORCID: https://orcid.org/0000-0001-7719-661X)
- I. Kucher (ORCID: https://orcid.org/0000-0001-7561-5040)
- Nermine Ali
- Vincent Lorrain (ORCID: https://orcid.org/0009-0005-9909-2017)
- Olivier Bichler
- Alexandre Valentian (ORCID: https://orcid.org/0000-0002-4319-6563)
- Sylvain Choisnet
- Baptiste Rossigneux
- Lilian Billod
- Vincent Templier
Institutions
- Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR)
- Université Paris-Saclay (FR)
- CEA Grenoble (FR)
- Laboratoire d'Intégration des Systèmes et des Technologies (FR)
- Université Grenoble Alpes (FR)
Publication Details
- Published
- 2024-11-07
- DOI
- https://doi.org/10.1109/apccas62602.2024.10808841
- Citations
- 1
- Primary Topic
- Image Processing Techniques and Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.32