An Energy-Efficient and High-Accuracy Spiking Neural Network Utilizing Asynchronous CORDIC for On-FPGA STDP Learning

In the field of neuromorphic systems, Spiking Neural Networks (SNNs) present notable advantages in energy conservation and real-time learning. This paper proposes anefficient hardware design for biological neuron models, specifically utilizing the Leaky Integrate and Fire (LIF) neuron and the COordinate Rotation DIgital Computer (CORDIC) algorithm. The asynchronous CORDIC (async-CORDIC) based design significantly improves accuracy and energy efficiency, outperforming conventional CORDIC approaches. We integrate CORDIC iterative pipelines with dual-rail logic using handshaking control, reducing switching activity and power dissipation by approximately 23%. Async-CORDIC design improves hardware efficiency, Spike-Timing Dependent Plasticity (STDP) based learning, and energy efficiency on FPGA, enhancing switching cycle utilization by 21% through fewer iteration stages. Our design reduces the average error in STDP exponentiation calculations by 39%. In real-world tasks, such as digit classification using the MNIST dataset, our implementation achieves up to approximately 95% accuracy.