A Dynamic Approximation Processor Based on Out-of-Order RISC-V in 28-nm CMOS

Approximate computing aims to reduce the amount of computation that does not impact the usefulness of the results, achieving faster and more efficient execution. Various approximation methods have been proposed, among which the concepts involving instruction sets that adjust approximation levels at runtime have recently emerged. In this study, we formulate an ISA enabling on-demand approximation, design a microarchitecture in RTL, and develop a first dynamic on-demand approximation processor chip fabricated using the TSMC $28-\mathrm{nm}$ process. This chip development bridges the gap between theoretical simulation and real-world application, enabling more energy-efficient and responsive systems that can adapt to user-demanded quality requirements in real time. With the chip, on-demand efficient approximation is realized enabling dynamic adjustment of the approximation level during execution. It is confirmed that the execution time is reduced proportionally to the level of approximation. As we carefully introduce the additional modules with attention to pipeline performance, they are implemented without reducing the operating frequency, increasing the area by $\mathbf{1. 1 \%}$ and the power by $0.86 \%$.