Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme

Cryptographic Suite for Algebraic Lattices (CRYSTALS) - Kyber is known for its efficiency and security in resisting the quantum computer attacks, beating the conventional encryption methods in the post quantum computing era. Number Theoretic Transform (NTT), used for polynomial multiplication, is one of the computationally expensive units in Kyber. In this article, we present a novel systolic architecture of NTT with minimized Processing Elements (PE) to replace the conventional Butterfly Unit (BU) architecture. This approach reduces the design complexity and the computational delay of the unit, as we minimize the hardware required for the implementation. A significant improvement of more than 40% in terms of area time product is achieved employing this approach with minimum hardware, as compared to the traditional lightweight sequential NTT. In comparison to the existing architectures, a reduction in the area by utilizing 37-60% fewer resources like FFs, and LUTs is observed.

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Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808929
Primary Topic
Embedded Systems Design Techniques
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article
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article

Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme

Vikramkumar Pudi, Keerthija Puli
Embedded Systems Design Techniques
article

Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme

Vikramkumar Pudi, Keerthija Puli
article en

Abstract

Cryptographic Suite for Algebraic Lattices (CRYSTALS) - Kyber is known for its efficiency and security in resisting the quantum computer attacks, beating the conventional encryption methods in the post quantum computing era. Number Theoretic Transform (NTT), used for polynomial multiplication, is one of the computationally expensive units in Kyber. In this article, we present a novel systolic architecture of NTT with minimized Processing Elements (PE) to replace the conventional Butterfly Unit (BU) architecture. This approach reduces the design complexity and the computational delay of the unit, as we minimize the hardware required for the implementation. A significant improvement of more than 40% in terms of area time product is achieved employing this approach with minimum hardware, as compared to the traditional lightweight sequential NTT. In comparison to the existing architectures, a reduction in the area by utilizing 37-60% fewer resources like FFs, and LUTs is observed.

Indian Institute of Technology Tirupati (IN)
Openalex Percentile: Top 74%
Embedded Systems Design Techniques
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Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme — Vikramkumar Pudi, Keerthija Puli · (2024) | TGRS Research Map | TGRS