LEAM: A Low-Area and Efficient Accelerator of Matrix-Vector Multiplication for Homomorphic Encryption

Homomorphic encryption (HE) is regarded as one of the most promising techniques for privacy-preserving computing. However, the enormous data and computations form the bottleneck of its widespread applications. Most of previous works focus on accelerating the vector/polynomial multiplication (VM) based on NTT in hardware, mainly considering the tradeoff between performance and flexibility. The data transferring, whereas, is more significant for HE when applying for hardware-software co-designs (HSCDs). Therefore, in this paper, we accelerate the matrix-vector multiplication (MVM), which is widely-used in most popular HE applications, as a coarse-grain hardware module called LEAM for HSCDs. We specifically devise the NTT/INTT architectures with typical point and moduli to achieve high speed and low complexity. Several NTT and INTT are carefully designed in parallel and reused in different stages with high hardware utilization. FPGA results show that compared with the state-of-the-art, named CHAM, the resource overhead of LUT, FF, and DSP are reduced by $31.7 \%, 33.5 \%$, and $32.8 \%$, respectively, while the timing performance keeps almost unchanged.

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Published
2024-11-07
DOI
https://doi.org/10.1109/apccas62602.2024.10808213
Primary Topic
Cryptography and Data Security
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article
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article

LEAM: A Low-Area and Efficient Accelerator of Matrix-Vector Multiplication for Homomorphic Encryption

Z. Cui, Jing Tian
Cryptography and Data Security
article

LEAM: A Low-Area and Efficient Accelerator of Matrix-Vector Multiplication for Homomorphic Encryption

Z. Cui, Jing Tian
article en

Abstract

Homomorphic encryption (HE) is regarded as one of the most promising techniques for privacy-preserving computing. However, the enormous data and computations form the bottleneck of its widespread applications. Most of previous works focus on accelerating the vector/polynomial multiplication (VM) based on NTT in hardware, mainly considering the tradeoff between performance and flexibility. The data transferring, whereas, is more significant for HE when applying for hardware-software co-designs (HSCDs). Therefore, in this paper, we accelerate the matrix-vector multiplication (MVM), which is widely-used in most popular HE applications, as a coarse-grain hardware module called LEAM for HSCDs. We specifically devise the NTT/INTT architectures with typical point and moduli to achieve high speed and low complexity. Several NTT and INTT are carefully designed in parallel and reused in different stages with high hardware utilization. FPGA results show that compared with the state-of-the-art, named CHAM, the resource overhead of LUT, FF, and DSP are reduced by $31.7 \%, 33.5 \%$, and $32.8 \%$, respectively, while the timing performance keeps almost unchanged.

Nanjing University (CN)
Openalex Percentile: Top 78%
Cryptography and Data Security
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LEAM: A Low-Area and Efficient Accelerator of Matrix-Vector Multiplication for Homomorphic Encryption — Z. Cui, Jing Tian · (2024) | TGRS Research Map | TGRS