Model-Based Design Methodology for Non-Inverting Buck-Boost Converter with Enhanced Duty Overlap Control and DVS

Non-Inverting Buck-Boost (NIBB) Converter experiences a dead zone during mode transitions, causing output voltage ripple to exceed specifications due to pulse skipping. This paper examines several control methods to mitigate pulse skipping and introduces an enhanced duty overlap control technique to ensure that output voltage ripple remains within specifications across different voltage ranges. Additionally, a dynamic voltage scaling (DVS) function is introduced to provide varying output voltages for diverse applications. To verify the effectiveness of the proposed approach, a Matlab/Simulink Model-Based Design Methodology is employed for automatic HDL code generation. The auto-generated code facilitates direct chip implementation without manual adjustments. Fabricated using the TSMC $0.18 \mu \mathrm{~m}$ CMOS process, measurement results show that under different voltage conditions, the steady-state output voltage ripple is below $\pm 1 \%$, and the transient undershoot and overshoot are below $\pm 5 \%$.