Features of Architectural and Circuit Design Solutions When Designing Processors for Operation in FPGA

The article considers architectural and circuit solutions that can be applied in processor cores synthesized in programmable logic integrated circuits (FPGA) with FPGA and APSOC architecture to solve problems of hardware accelerator control. The granular structure of the matrix of logic cells in FPGA determines the specific requirements for circuit solutions that are optimal for implementation on this hardware platform. In addition, the possibility of implementing computing accelerators based on FPGA hardware resources makes it preferable to use processor cores as control subsystems of the computing complex, which also clarifies the requirements for processor cores that could be used in FPGA-based systems. A number of design techniques typical for high-performance processor cores implemented as part of VLSI seem to be suboptimal for FPGA. The article proposes to consider simple pipelines in combination with specialized instruction sets for control processors, as well as tight integration of peripheral devices.