High-Density ROM Design and Optimization Based on 12nm Technology

This article introduces a fully custom design of a high-density ROM, utilizing a 12nm process for microprocessor applications. To achieve objectives of all size, less area, and low power, the ROM circuit was entirely redesigned. Following the circuit design, a comprehensive custom layout was developed, and simulations were conducted to evaluate the read functionality, speed, and power consumption. The design operates use 12nm logical 0.01728um2 ROM cell, within a voltage range of O.7V-1.1V, and demonstrates overall superior performance compared to previous designs.