Charge-Pump-Circuit Implementation for Increasing Sink Current in Low-Voltage CMOS Retinal-Prosthesis Chips
Constant-current-mode, retinal-prosthesis chips require a high-voltage range to counteract the ohmic drop. To increase the sink-current capability of the chip, the voltage of the counter electrode was increased from 5 V to 7.5 V while maintaining the chip supply voltage at 5 V. This work demonstrates the implementation of a simple charge-pump circuit to handle the forward-bias current in the p-channel metal-oxide-semiconductor (PMOS) body using a 350-nm standard complementary metal-oxide-semiconductor (CMOS) process. The results show that the proposed chip can sink a wider impedance range than the previous chip while utilizing the same CMOS process. This chip exhibits a reverse-bias current issue, which is expected to be addressed in processes with a deep n-well layer.
Authors
- Kenzo Shodo (ORCID: https://orcid.org/0009-0009-9317-0925)
- Yuki Nakanishi (ORCID: https://orcid.org/0000-0003-3034-4077)
- Jun Ohta (ORCID: https://orcid.org/0000-0001-8194-9020)
- Yasuo Terasawa
- Kiyotaka Sasagawa (ORCID: https://orcid.org/0000-0002-5718-3958)
- Makito Haruta (ORCID: https://orcid.org/0000-0002-7155-9018)
- Kuang-Chih Tso (ORCID: https://orcid.org/0000-0002-1939-6127)
- Takaya Hattori (ORCID: https://orcid.org/0009-0005-5721-336X)
- Hiroyuki Tashiro (ORCID: https://orcid.org/0000-0001-5669-154X)
- Hironari Takehara (ORCID: https://orcid.org/0000-0001-7689-1186)
- Yoshinori Sunaga (ORCID: https://orcid.org/0000-0002-8334-9667)
- Wisaroot Sriitsaranusorn (ORCID: https://orcid.org/0009-0009-9323-8205)
Institutions
- Chitose Institute of Science and Technology (JP)
- Kyushu University (JP)
- Nidek (Japan) (JP)
- Nara Institute of Science and Technology (JP)
Publication Details
- Published
- 2024-11-07
- DOI
- https://doi.org/10.1109/apccas62602.2024.10808237
- Primary Topic
- Neuroscience and Neural Engineering
- Type
- article
- Field-Weighted Citation Impact
- 0.00