Unveiling the Hybrid‐Channel (poly‐Si/IGO) Structure for 3D NAND Flash Memory for Improving the Cell Current and GIDL‐Assisted Erase Operation

Oxide semiconductors (OSs) are promising materials for NAND flash memory, offering the advantages of high field‐effect mobility and superior large‐area uniformity but suffering from low thermal stability, trade‐off between mobility and stability, and the impossibility of the erase operation. To address these drawbacks, herein a hybrid‐channel structure comprising heterostacked poly‐Si and In–Ga–O (IGO) is developed. IGO is used as the main channel to achieve thermal stability above 800 °C, and the fabrication process is optimized to achieve superior electrical properties ( μ FE = 103.66 cm 2 V −1 s −1 , subtreshold swing = 96 mV decade −1 ) and reliability (0.07 V positive shift during the positive bias temperature stress of 3 MV cm −1 at 100 °C for almost 3 h). Poly‐Si is used to generate the gate‐induced drain leakage current and enable the erase operation. The developed structure is used to fabricate 2D planar and three‐layer stacked 3D NAND flash memories. The superior electrical properties ( μ FE = 116.08 cm 2 V −1 s −1 , I on = 4.73 μA μm −1 ) and deviations of the hybrid‐channel NAND memory are comparable with those of its OS‐channel counterpart. The use of the hybrid‐channel structure in the NAND memories enables the realization of the erase operation with a large memory window (≈3.60 V).