Advancing Communication Systems: A Novel Low-Power ADC Design in 45nm CMOS Technology

This paper introduces a pioneering study aimed at advancing semiconductor technology, particularly in Analog to Digital Converters (ADCs), essential for modern communication systems. The research proposes a cutting-edge communication system leveraging 45nm CMOS technology, featuring an improved ADC with low power consumption. Addressing the critical balance between signal integrity and power efficiency in integrated circuits, the study conducts thorough theoretical research on ADC topology to devise a framework suitable for low-power applications. A key innovation is the introduction of a novel low-power ADC, showcasing impressive performance metrics including a 67 dB Signal-to-Noise Ratio (SNR), a 62 dB Signal-to-Noise and Distortion Ratio (SNDR), and a 78 dB Spurious-Free Dynamic Range (SFDR). This work significantly advances communication system development and marks a milestone in the ever-evolving communication industry.