A Scalable, Multi-Core, Multi-Function, Integrated CMOS/Memristor Sensor Interface for Neural Sensing Applications
This paper presents the architecture, design, and testing results of a scalable, multi-core, multi-function sensor interface, integrating CMOS technology and memristor elements for efficient neuromorphic and bio-inspired analysis. The architecture leverages the high-density and non-volatile properties of memristors to support different analysis functions. Each processing core is equipped with hybrid CMOS/memristor arrays, enabling real-time parallel acquisition and analysis, and each can be configured independently. The system facilitates communication between cores and is fully scalable. The first implementation supports 16 input channels, storing 256 neural signal samples, and the second implementation supports 576 input channels, storing 9k neural signal samples.
Authors
- Themis Prodromakis (ORCID: https://orcid.org/0000-0002-6267-6909)
- Xiongfei Jiang (ORCID: https://orcid.org/0000-0002-8736-2914)
- Shiwei Wang (ORCID: https://orcid.org/0000-0002-5450-2108)
- Grahame Reynolds
- Spyros Stathopolous
Institutions
- University of Edinburgh (GB)
Publication Details
- Journal
- Electronics
- Published
- 2024-12-25
- DOI
- https://doi.org/10.3390/electronics14010030
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- Royal Society
- Engineering and Physical Sciences Research Council