Understanding Localized Current Leakage in Silicon‐Based Heterojunction Solar Cells

ABSTRACT Current leakage through localized stacked structures, comprising opposite types of carrier‐selective transport layers, is a prevalent issue in silicon‐based heterojunction solar cells. Nevertheless, the behavior of this leakage region remains unclear, leading to a lack of guidance for structural design, material selection and process sequence control, thereby causing fluctuations of device performance. This study elucidates current‐voltage characteristics, influential factors, and underlying carrier transport mechanism of the leakage region with different stacking sequences and explores their impact on various configurations of solar cells. Characteristics of the leakage region resembling Esaki diodes or reverse diodes are revealed, along with the bias conditions of the leakage region at different locations across the solar cell. The findings suggest that modulating the behavior of the leakage region is feasible for improving device performance or serving specific purposes. This work provides guidance for the design and assessment of current leakage in the edge region of front and back contact cells, in the gap region of conventional back‐contacted cells, as well as in the tunneling region of tunneling back‐contacted cells and tandem cells.