Design and Implementation of High Speed and Low Power Filter
In order to solve the problems of complex structure and high power consumption of current sampling filter circuit, a high speed and low power Filter design scheme based on pipeline structure is proposed in this paper. This filter is composed of recursive CIC filter and FIR filter based on shift adder. The order of CIC filter and FIR filter can be adjusted according to the difference between the measured temperature and the threshold temperature range set by the user, thus the power consumption of the filter is reduced. The experimental results show that, under the same conditions, the utilization rate of the LUS is reduced by 86%, the power consumption is reduced by 88%, and the utilization rate of the LUS is reduced by 90% compared with the half-band comb filter, power consumption is reduced by 28%.
Authors
- Wei Zheng (ORCID: https://orcid.org/0000-0002-2853-6021)
- Hui Liu (ORCID: https://orcid.org/0009-0009-0146-1072)
Institutions
- Qingdao University of Technology (CN)
Publication Details
- Journal
- Journal of Nanoelectronics and Optoelectronics
- Published
- 2024-11-01
- DOI
- https://doi.org/10.1166/jno.2024.3680
- Primary Topic
- Advanced Sensor and Control Systems
- Type
- article
- Field-Weighted Citation Impact
- 0.00