Intelligent Parking System Using Verilog

Among closed places like cities, apartments, and multistory buildings, parking of the different vehicles is quite problematic, and the main problem is the space, which is not enough, and the staff must be used, which is problematic. The current write-up describes a method of parking that is optimized by using FPGA's on-car parking with multiple slots for the space-constrained environment and high manual effort. The main objective set in this work was the creation of the design of the parking system for the car with the help of Verilog programming and the QuestaSim tool. The synthesis of the system is done using the Xilinx-20.1 Integrated Synthetization Environment. Implementation of finitestate machine in an asynchronous vehicle parking system is made. This approach provides power- efficiency and, thus, very low standby power consumption. This parking system greatly reduces the stress of parking in restricted areas. The system introduced shows a minimum occupied space, thus proving to be an alternative way of controlling parking in an overpopulated metropolitan area. In general, this technology plays a vital role in planning to develop more efficient, sustainable, and, of course, more attractive urban areas.