Performance Evaluation of a High-Frequency PLL with a 20.70 GHz VCO and Low-Phase Noise

The evaluation of the performance of a Phase-Locked Loop (PLL) proposed to produce a Voltage-Controlled Oscillator (VCO) frequency of 20.70 GHz is presented in this paper. Phase noise measurements at a 1 MHz offset from the carrier frequency show a final phase noise of ${- 1 05.50} \mathrm{~ d B c} / \mathrm{H z}$. The system’s Figure of Merit (FOM), which shows how well the PLL performs in terms of phase noise to power consumption, is $-38.38 \mathrm{dBc} / \mathrm{Hz}$ at an offset of 100 kHz and $-108.51 \mathrm{dBc} / \mathrm{Hz}$ at an offset of 1 MHz. The results presented emphasize the PLL’s applicability for high-frequency applications where low-phase noise and high-frequency.