PNCS: A Privately Non-Cacheable Strategy for Synchronization in Multi-Core Systems

Not all data sharing patterns can benefit from the write invalidate strategy in multi-core systems. When handling serialized synchronizations, such as lock, barrier etc., long delays and large amount of cache coherence traffic caused by invalidations introduce performance bottlenecks. This paper introduces a privately non-cacheable strategy (PNCS), which favors the maintenance of shared data exhibiting write-once characteristic, like locks, used in synchronizations among threads by not caching the corresponding data block in the private caches but the shared last-level cache. While cooperating with traditional cache coherence protocol MESI, PNCS implements data forwarding of a shared lock to the next sharer waiting in the request queue at the last-level cache (LLC) without incurring another round of LLC lookup. Simulation results reported that PNCS can accelerate acquisition of the variable by the requesters while cutting down the invalidation traffic during a synchronization phase. By creating applications that involve large-scale thread synchronization under parallel programming directives, results demonstrated that PNCS scales within multi-core systems. In the scenario of 64-thread lock synchronization, the average latency of contending requests can be reduced to about 73% of that in “cache lock”, which is a strict write invalidate strategy proposed by Intel.

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Publication Details

Published
2024-09-27
DOI
https://doi.org/10.1109/eiecs63941.2024.10800211
Primary Topic
Advanced Memory and Neural Computing
Type
article
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article

PNCS: A Privately Non-Cacheable Strategy for Synchronization in Multi-Core Systems

Yu Zhou, An-Chow Lai, Ting Guo, Jian Shao et al.
Advanced Memory and Neural Computing
article

PNCS: A Privately Non-Cacheable Strategy for Synchronization in Multi-Core Systems

Yu Zhou, An-Chow Lai, Ting Guo, Jian Shao, Liang Yang
article en

Abstract

Not all data sharing patterns can benefit from the write invalidate strategy in multi-core systems. When handling serialized synchronizations, such as lock, barrier etc., long delays and large amount of cache coherence traffic caused by invalidations introduce performance bottlenecks. This paper introduces a privately non-cacheable strategy (PNCS), which favors the maintenance of shared data exhibiting write-once characteristic, like locks, used in synchronizations among threads by not caching the corresponding data block in the private caches but the shared last-level cache. While cooperating with traditional cache coherence protocol MESI, PNCS implements data forwarding of a shared lock to the next sharer waiting in the request queue at the last-level cache (LLC) without incurring another round of LLC lookup. Simulation results reported that PNCS can accelerate acquisition of the variable by the requesters while cutting down the invalidation traffic during a synchronization phase. By creating applications that involve large-scale thread synchronization under parallel programming directives, results demonstrated that PNCS scales within multi-core systems. In the scenario of 64-thread lock synchronization, the average latency of contending requests can be reduced to about 73% of that in “cache lock”, which is a strict write invalidate strategy proposed by Intel.

China Electronics Technology Group Corporation (CN)
Openalex Percentile: Top 78%
Advanced Memory and Neural Computing
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PNCS: A Privately Non-Cacheable Strategy for Synchronization in Multi-Core Systems — Yu Zhou, An-Chow Lai, et al. · (2024) | TGRS Research Map | TGRS