Progress and Prospects of InAs-Based FinFETs From Process Optimization to Device Architectural Innovation

Indium arsenide (InAs)-based fin field-effect transistors (FinFETs) are emerging as potential alternatives to traditional Si technologies due to their exceptional carrier mobility and high saturation velocity, which are crucial for advancing Moore’s law. Recent developments in operating principles, processing methods, and architectural designs have enabled the aggressive scaling of InAs-based FinFETs and their successful integration with Si wafers, bringing their key performances comparable to that of Si-based counterparts. However, several obstacles prevent their widespread adoption, including difficulties in creating uniform fin structures, optimizing metal contacts, and controlling interface defects. This review explores the recent innovations in the processing techniques and architectural designs of InAs-based FinFETs, with a focus on overcoming scaling and integration challenges. In addition, it proposes new technological approaches to address the limitations, supporting the continued evolution of InAs-based technology.

Authors

Institutions

Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2024-12-24
DOI
https://doi.org/10.1109/ted.2024.3519489
Citations
3
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
0.63

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Progress and Prospects of InAs-Based FinFETs From Process Optimization to Device Architectural Innovation

Mei Ge, Chenhui Yu, Weizhi Meng, Jiarui Zhang et al.
3 citations
IEEE Transactions on Electron Devices
Semiconductor materials and devices
0.63
article

Progress and Prospects of InAs-Based FinFETs From Process Optimization to Device Architectural Innovation

Mei Ge, Chenhui Yu, Weizhi Meng, Jiarui Zhang, Yan Zhang, Yijin Wang, Man Luo, Jintong Xu
article en
3 citations

Abstract

Indium arsenide (InAs)-based fin field-effect transistors (FinFETs) are emerging as potential alternatives to traditional Si technologies due to their exceptional carrier mobility and high saturation velocity, which are crucial for advancing Moore’s law. Recent developments in operating principles, processing methods, and architectural designs have enabled the aggressive scaling of InAs-based FinFETs and their successful integration with Si wafers, bringing their key performances comparable to that of Si-based counterparts. However, several obstacles prevent their widespread adoption, including difficulties in creating uniform fin structures, optimizing metal contacts, and controlling interface defects. This review explores the recent innovations in the processing techniques and architectural designs of InAs-based FinFETs, with a focus on overcoming scaling and integration challenges. In addition, it proposes new technological approaches to address the limitations, supporting the continued evolution of InAs-based technology.

IEEE Transactions on Electron DevicesVol. 72(2)
Chinese Academy of Sciences (CN), Nantong University (CN), Shanghai Institute of Technical Physics (CN)
National Natural Science Foundation of China
Industry, innovation and infrastructure
Openalex Percentile: Top 30%
Semiconductor materials and devices
0.63
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Progress and Prospects of InAs-Based FinFETs From Process Optimization to Device Architectural Innovation — Mei Ge, Chenhui Yu, et al. · IEEE Transactions on Electron Devices (2024) | TGRS Research Map | TGRS