Dual Multimodal Fusions With Convolution and Transformer Layers for VLSI Congestion Prediction
In very large scale integration (VLSI) circuit physical design, precise congestion prediction during placement is crucial for enhancing routability and accelerating design processes. Existing congestion prediction models often encounter challenges in handling multimodal information and lack effective fusion of placement and netlist features, limiting their prediction accuracy. In this article, we present a novel congestion prediction model that leverages dual multimodal fusions with convolution and transformer layers to effectively capture the multiscale placement information and enhance congestion prediction accuracy. We first adopt convolutional neural networks (CNNs) to extract grid-based placement features and heterogeneous graph convolutional networks (HGCNs) to extract netlist information. To help the model understand the correlation between different modalities, we then propose an early feature fusion (EFF) to integrate netlist knowledge into multiscale placement features at multimodal interaction subspace. Besides, a deep feature fusion (DFF) method is proposed to further fuse multimodal features, which has multiple vision transformer layers based on adaptive attention enhancement technology. These layers include self-attention (SA) to boost intramodal features and cross-attention (CA) to perform cross-modal feature fusion on netlist and grid-based placement features. Finally, the output features of DFF are sent into the cascaded decoder to recover the congestion map by exploiting several upsampling layers and merging with EFF features. Compared with the existing state-of-the-art congestion prediction models, experimental results demonstrate that our model not only outperforms them in prediction accuracy, but also excels in reducing routing congestion when integrated into the placer DREAMPlace.
Authors
- Jun Yang (ORCID: https://orcid.org/0000-0002-8379-0321)
- Hao Gu (ORCID: https://orcid.org/0000-0002-3110-2531)
- Ziran Zhu (ORCID: https://orcid.org/0000-0002-9475-6364)
- Xinglin Zheng (ORCID: https://orcid.org/0009-0008-4182-4328)
- Youwen Wang
- Keyu Peng (ORCID: https://orcid.org/0009-0004-2438-726X)
- Jianli Chen (ORCID: https://orcid.org/0000-0002-1391-2696)
Institutions
- Fudan University (CN)
- Southeast University (CN)
Publication Details
- Journal
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 2024-12-23
- DOI
- https://doi.org/10.1109/tcad.2024.3522199
- Citations
- 2
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.98
Funders
- National Natural Science Foundation of China
- National Key Research and Development Program of China