ViT-Reg: Regression-Focused Hardware-Aware Fine-Tuning for ViT on TinyML Platforms
Editor’s notes: This article presents a hardware-aware methodology for modeling the performance and energy behavior of vision transformers (ViTs) across a wide design space relevant to TinyML platforms. It serves as a valuable framework for balancing accuracy and efficiency in deploying ViTs on resource-constrained edge systems such as autonomous robotics. —Theocharis Theocharides, University of Cyprus, Cyprus —Marian Verhelst, KU Leuven, Belgium —Vijay Janapa Reddy, Harvard University, USA —Evgeni Gousev, Qualcomm, USA
Authors
- Arnab Neelim Mazumder (ORCID: https://orcid.org/0000-0002-9550-7917)
- Tinoosh Mohsenin (ORCID: https://orcid.org/0000-0001-5551-2124)
- Md. Ragib Shaharear
Institutions
- Johns Hopkins University (US)
- University of Maryland, Baltimore County (US)
Publication Details
- Journal
- IEEE Design and Test
- Published
- 2024-12-23
- DOI
- https://doi.org/10.1109/mdat.2024.3521320
- Citations
- 2
- Primary Topic
- Parallel Computing and Optimization Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.98