Low-Complexity and Efficient Spike Sorting Algorithm Implemented on FPGA

Next-generation neural interface systems will have an increasing number of channels and higher resolution to process signals from thousands of neurons. Online spike sorting is an effective method to ease the data bandwidth bottleneck. However, existing algorithms with high accuracy often have higher computational complexity in feature extraction. This paper presents a novel feature extraction method for spike sorting. The method is implemented on a Field Programmable Gate Array (FPGA) to verify its performance. The experimental results show that the proposed algorithm achieves high classification accuracy while compressing signals, without leading to a significant increase in computation or resource utilization.