A 13.56-MHz 94%-PCE Active Rectifier with Timing-Mode Delay Compensation for Implantable Medical Devices

In this paper, a CMOS active rectifier with closed-loop timing-mode delay compensation has been proposed. It utilizes the switching of input pairs of comparators (CMPs) to introduce offset and relies on an edge-based feedback loop to define the timing for offset introduction. Compared with existing compensation methods, the proposed active rectifier can use much smaller power transistors as the additional power dissipation in offset introduction circuit has been eliminated in the CMPs. Hence it occupies a smaller footprint while achieving a competitive power conversion efficiency (PCE) and voltage conversion rate (VCR) to prior arts. The proposed active rectifier has been simulated in the Cadence Virtuoso environment using X-FAB’s $0.18-\mu \mathrm{m}$ CMOS process. It occupies an area of $0.105 \mathrm{~mm}^{2}$. The simulation results show that the peak PCE is 94.0% with a $\mathbf{2 3 0}-\Omega$ load and the peak VCR is $\mathbf{9 8. 2 \%}$ with a $1-\mathrm{k} \Omega$ load when the active rectifier’s input is 3 V.