A TDM-based Analog Front-End for Ear-EEG Recording with 74.5-G Ω Input Impedance, 384-mV DC Tolerance and 0.27-μ V_rms Input-Referred Noise

This paper presents the design of a time-division multiple xed capacitive ly-couple d chopper analog front-e end (AFE) with a novelimpedance boost loop (IBL) and a noveIDC servo loop (DSL). The proposed IBL has two impedance booting loops for compensating leakage current due to parasitic capacitance from the ESD pad and external interconnections, and the chopper. By shifting the compensation node from the feedback pathway to the amplifier’s inputs, this work realizes a higher-resolution compensation, boosting the input impedance of the AFE to several tens of G $\Omega$. The proposed DSL consists of a coarse DSL driven by DC supply voltages and a fine DSL driven by five phase-interleaving pulse-width modulated waveforms (PI-PWM). Avoiding the usage of $\Delta \mathrm{\Sigma}$ CDAC, the energy efficiency is better than conventional DSLs. Designed in a $0.18-\mu \mathrm{m}$ CMOS process, the AFE consumes $4.5 \mu \mathrm{~A}$ from a 1.2-V supply. The simulated input referred noise is $0.27 \mu \mathrm{~V}_{\text {rms}}$ from 0.5 to 100 Hz in the presence of a $384-\mathrm{mV}$ EDO. With a $10-\mathrm{pF}$ parasitic capacitance, the proposed AFE achieves an input impedance of more than $74.5 \mathrm{G} \Omega$ at 1 Hz and $6.4 \mathrm{G} \Omega$ at 50 Hz. The simulation results have been robust under 100 Monte-Carlo samples.