Microarchitectural Attacks and Mitigations on Retire Resources in Modern Processors

In modern processors, the Retire Control Unit (RCU) is responsible for receiving the µops decoded from the frontend and retiring the completed µops in order through the retirement. Consequently, the retirement may stall differently depending on the execution time of the first instruction in the RCU, causing varying stalling in the RCU reception. Moreover, We find that the RCU reception in AMD processors and retirement in Intel processors are shared between two logical cores of the same physical core, allowing an attacker to infer the instructions executed by another logical core based on its retire resources efficiency. Based on these findings, we introduce the retirement covert channel on Intel processors and the RCU covert channel on AMD processors. Furthermore, we explores additional applications of retire resources. On the one hand, we combined the misprediction penalty mechanism to apply our covert channels to the Spectre attacks. On the other hand, based on the principle that different programs result in varied usage patterns of retire resources, we propose an attack method that leverages the retire resources to infer the program run by the victim. Finally, we design the corresponding mitigations and extend our mitigation to fetch unit to reduce the performance overhead.

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Journal
IEEE Transactions on Computers
Published
2024-12-23
DOI
https://doi.org/10.1109/tc.2024.3521225
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
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article
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article

Microarchitectural Attacks and Mitigations on Retire Resources in Modern Processors

Quancheng Wang, Ming Tang, Han Wang, Ke Xu
1 links
IEEE Transactions on Computers
Physical Unclonable Functions (PUFs) and Hardware Security
article

Microarchitectural Attacks and Mitigations on Retire Resources in Modern Processors

Quancheng Wang, Ming Tang, Han Wang, Ke Xu
article en

Abstract

In modern processors, the Retire Control Unit (RCU) is responsible for receiving the µops decoded from the frontend and retiring the completed µops in order through the retirement. Consequently, the retirement may stall differently depending on the execution time of the first instruction in the RCU, causing varying stalling in the RCU reception. Moreover, We find that the RCU reception in AMD processors and retirement in Intel processors are shared between two logical cores of the same physical core, allowing an attacker to infer the instructions executed by another logical core based on its retire resources efficiency. Based on these findings, we introduce the retirement covert channel on Intel processors and the RCU covert channel on AMD processors. Furthermore, we explores additional applications of retire resources. On the one hand, we combined the misprediction penalty mechanism to apply our covert channels to the Spectre attacks. On the other hand, based on the principle that different programs result in varied usage patterns of retire resources, we propose an attack method that leverages the retire resources to infer the program run by the victim. Finally, we design the corresponding mitigations and extend our mitigation to fetch unit to reduce the performance overhead.

IEEE Transactions on ComputersVol. 74(4)
Wuhan University (CN)
Openalex Percentile: Top 75%
Physical Unclonable Functions (PUFs) and Hardware Security
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Microarchitectural Attacks and Mitigations on Retire Resources in Modern Processors — Quancheng Wang, Ming Tang, et al. · IEEE Transactions on Computers (2024) | TGRS Research Map | TGRS