Design and implementation of smart traffic light controller with emergency vehicle detection on FPGA

Increased traffic volumes resulting from urbanization, industrialization, and population growth have given rise to complex issues, including congestion, accidents, and traffic violations at intersections. In the absence of a functional smart traffic light system, traffic congestion occurs due to imbalanced traffic flow at intersections. Current traffic management lacks provisions for ensuring the unobstructed movement of emergency vehicles, even a small delay for which can have significant consequences. This paper presents a smart traffic light controller developed using Verilog hardware description language (HDL) in Quartus Prime 21.1 and Questa Intel field programmable gate array (FPGA) Starter Edition 2021.2, and implemented on an Altera DE2-115 FPGA. The controller is designed specifically to detect emergency vehicle at four-way intersections for inputs radio frequency identification (RFID) readers and infrared (IR) sensors. The RFID readers and IR sensors are managed through slide switches on the FPGA board. The smart traffic light controller contains three sub-modules: clock division, counter, and finite state machine (FSM) operation, enabling it to manage traffic in scenarios with emergency vehicles, high traffic density, and low traffic density. This proposed system can alleviate intersection congestion by controlling access and allocating time effectively. In conclusion, the project ensures the smooth passage of emergency vehicles by continuously monitoring their presence and giving them priority in traffic flow.