Radiation-Hardened 16T SRAM Cell with Improved Read and Write Stability for Space Applications

The critical charge of sensitive nodes decreases as transistors scale down with the advancement of CMOS technology, making SRAM cells more susceptible to soft errors in the space industry. When a radiation particle strikes a sensitive node of a conventional 6T SRAM cell, a single event upset (SEU) can occur, flipping in the stored data in the cell. Additionally, charge sharing between transistors can cause single-event multi-node upsets (SEMNUs), where data in multiple nodes are flipped simultaneously due to a single particle strike. Therefore, this paper proposes a radiation-hardened high stability 16T (RHHS16T) cell for space applications. The characteristics of RHHS16T are evaluated and compared with previously proposed radiation-hardened SRAM cells such as QUCCE12T, WEQUATRO, RHBD10T, RHD12T, RSP14T, RHPD14T, and RHBD14T. Simulation results for RHHS16T indicated that the proposed cell demonstrates improved performance in read stability, write access time, and write stability compared to all comparison cells. These improvements in the proposed cell are achieved with higher power consumption and a minor area penalty. Notably, isolating the storage node from the bit line during read operations and the feedback loop between nodes during write operations enables the proposed RHHS16T to achieve enhanced read stability and write stability, respectively. The proposed integrated circuit was implemented using a 90 nm CMOS process and operates at a supply voltage of 1V. Furthermore, RHHS16T provides high immunity against SEUs and SEMNUs. Through its enhanced read and write stability, it ensures reliable data retention for space applications.