BEOL Three-Dimensional Stackable Oxide Semiconductor CMOS Inverter with a High Voltage Gain of 233 at Cryogenic Temperatures

Targeting high-performance computing at cryogenic temperatures, we report back-end-of-line (BEOL)-compatible p-type Te-TeO<sub><i>x</i></sub> field effect transistors (FETs) deposited using a sputtering method that is cost-effective, large-scale manufacturable, and highly controllable. Combined with the indium tin oxide channel n-FETs employing a common gate and HfO<sub>2</sub> gate dielectric, BEOL three-dimensional stackable oxide semiconductor complementary metal oxide semiconductor (CMOS) inverters were further realized, demonstrating excellent threshold voltage matching, with a high voltage gain of 132 with a 2 V supply voltage (<i>V</i><sub>DD</sub>) at room temperature. At cryogenic temperatures, the CMOS inverter exhibits significantly enhanced performance, achieving a voltage gain of 233 at a <i>V</i><sub>DD</sub> of 2 V with a wide noise margin of 86%. Even at an ultralow <i>V</i><sub>DD</sub> of 0.5 V, the CMOS inverter maintains solid performance with an exceptionally low power consumption of <60 pW.

Authors

Institutions

Publication Details

Journal
Nano Letters
Published
2024-12-20
DOI
https://doi.org/10.1021/acs.nanolett.4c04701
Citations
8
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
1.67

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

BEOL Three-Dimensional Stackable Oxide Semiconductor CMOS Inverter with a High Voltage Gain of 233 at Cryogenic Temperatures

Zijie Zheng, Wei Shi, Xiao Gong, Kaizhen Han et al.
8 citations
Nano Letters
Semiconductor materials and devices
1.67
article

BEOL Three-Dimensional Stackable Oxide Semiconductor CMOS Inverter with a High Voltage Gain of 233 at Cryogenic Temperatures

Zijie Zheng, Wei Shi, Xiao Gong, Kaizhen Han, Yuxuan Wang, Yuye Kang, Jinyong Wang, Ying Xu, Yiyuan Sun
article en
8 citations

Abstract

Targeting high-performance computing at cryogenic temperatures, we report back-end-of-line (BEOL)-compatible p-type Te-TeO<sub><i>x</i></sub> field effect transistors (FETs) deposited using a sputtering method that is cost-effective, large-scale manufacturable, and highly controllable. Combined with the indium tin oxide channel n-FETs employing a common gate and HfO<sub>2</sub> gate dielectric, BEOL three-dimensional stackable oxide semiconductor complementary metal oxide semiconductor (CMOS) inverters were further realized, demonstrating excellent threshold voltage matching, with a high voltage gain of 132 with a 2 V supply voltage (<i>V</i><sub>DD</sub>) at room temperature. At cryogenic temperatures, the CMOS inverter exhibits significantly enhanced performance, achieving a voltage gain of 233 at a <i>V</i><sub>DD</sub> of 2 V with a wide noise margin of 86%. Even at an ultralow <i>V</i><sub>DD</sub> of 0.5 V, the CMOS inverter maintains solid performance with an exceptionally low power consumption of <60 pW.

Nano LettersVol. 25(31)
National University of Singapore (SG)
Ministry of Education - Singapore
Affordable and clean energy
Openalex Percentile: Top 15%
Semiconductor materials and devices
1.67
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.