High-Current E-Mode InGaN/GaN p-FET on p-GaN Gate HEMT Platform

The low current density in E-mode GaN p-FET presents a severe challenge for its application in complementary logic (CL) circuits. In this work, a high-current E-mode InGaN/GaN p-FET is demonstrated on a p-GaN gate HEMT platform with p-InGaN/p-GaN/AlGaN/GaN heterostructure. The proposed heterostructure introduces a net polarization charge at the InGaN/GaN interface, leading to an enhanced 2DHG. With a negative gate bias, a buried 2DHG channel is formed prior to the surface MIS channel. As a result, the recess-gate InGaN/GaN p-FET with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{\text {G}} = 2~\mu $ </tex-math></inline-formula> m achieves a large maximum current (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\max }\text {)}$ </tex-math></inline-formula> exceeding −20 mA/mm. The InGaN/GaN p-FET obtains a low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {ON}}$ </tex-math></inline-formula> of 0.64 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega \cdot $ </tex-math></inline-formula> mm and a high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {ON}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {OFF}}$ </tex-math></inline-formula> ratio exceeding <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{7}}$ </tex-math></inline-formula>. The device presents E-mode operation with a threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}\text {)}$ </tex-math></inline-formula> of −1.8 V and a low subthreshold swing (SS) of 144 mV/dec. Furthermore, an E-mode n-channel GaN HEMT is fabricated on the same platform, validating the potential of the proposed InGaN/GaN p-FET for GaN CL circuits.