Thermal Performance Improvement Potential of Top and Bottom-Cooled Power-SOIC Devices

This study evaluates the thermal performance of power-SOIC packaged devices that find applications in wide-bandgap technology, and which can be offered to be implemented on a top- or bottom-cooled solution. The potential of improving the package technology by utilizing advanced substrates such as Silicon Nitride (Si<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>N<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf>) is assessed, which provides additional benefits for wide-bandgap devices, including voltage isolation. The study simulates and validates the proposed solution by packaging the devices and implementing the improvements recommended. Experimental validation is conducted through full electrothermal characterization to obtain temperature profiles, structure functions, thermal resistances, and estimated chip temperatures using temperature sensitive electric parameters (TSEP). The results show potential improvements of approximately 14% in thermal performance.