Design of a 650V 400A Half-Bridge GaN Power Module

In order to take full advantage of the high switching speeds of gallium nitride (GaN) devices in high-power-density applications, a novel approach to reducing power loop stray inductance by reducing and equalising the current loops of paralleled devices, is presented in this paper. The design of a unique substrate layout, that serves to evenly distribute current to the paralleled devices is described in detail, and then verified through simulation using ANSYS Q3D. The simulation results are then compared with measurements of the physical device, to determine the effectiveness and feasibility of the design.