On the Design and Effectiveness of Isolation Trenches to Suppress Substrate Coupling in Power Integrated Circuits in GaN-on-Si Technology

We present electromagnetic (EM) investigation of isolation trenches of feasible designs and their effectiveness to suppress substrate coupling in power integrated circuits (ICs) in GaN-on-Si technology. The S-parameter results reveal that the air-filled or SiO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-filled design (etching the GaN buffer layer) can improve the signal isolation by about 8 dB (from -59 dB to -67 dB in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\vert S_{21}\vert$</tex> at 20 MHz) for a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$700-\mu m$</tex> lateral separation distance, with only very slight improvement (0.6 dB) for a grounded aluminum-filled trench. Using a wider trench has almost no help in improving the signal isolation indicated by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\vert S_{21}\vert$</tex>. The lateral position of the trench does not impact the signal isolation either. The electric field profiles obtained from EM simulations unveil the substrate coupling through the p-type Si substrate when using an isolation trench in the GaN buffer layer. These results can provide helpful guidelines for the monolithic integration of power electronic devices and circuits in GaN-on-Si technology.