Self-defined dual charge percolation networks for solution-processed multithreshold transistors

This study demonstrates multithreshold engineering of a solution-processed heterojunction electrochemical transistor using a blend of n-type CdSe tetrapod-shaped nanocrystals (TpNCs) and an n-type polymeric organic semiconductor (OSC). The unique geometry of TpNCs enables a broad concentration range of charge percolation, where charge transfer between TpNC and OSC domains determines multiple threshold voltages. The OSC domain’s threshold voltage shifts from 1 to −1 V as TpNC content increases, while the TpNC domain maintains a threshold above 1.5 V. This allows for stable intermediate states, crucial for multivalued logic operations. Charge percolation and photoluminescence studies show selective charge redistribution, shifting the threshold voltages in the polymer networks. Ternary logic gates, including TNOT, TNAND, and TNOR, based on these heterojunction transistors, were also demonstrated, highlighting the potential of this approach for advanced logic applications.

Authors

Institutions

Publication Details

Journal
npj Flexible Electronics
Published
2024-12-19
DOI
https://doi.org/10.1038/s41528-024-00372-6
Citations
4
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.83

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Self-defined dual charge percolation networks for solution-processed multithreshold transistors

Ho Sun Lim, Seunghan Kim, Youngjae Yoo, Jin Hyeon Kim et al.
4 citations
npj Flexible Electronics
Advanced Memory and Neural Computing
0.83
article

Self-defined dual charge percolation networks for solution-processed multithreshold transistors

Ho Sun Lim, Seunghan Kim, Youngjae Yoo, Jin Hyeon Kim, Moon Sung Kang, Jeong Ho Cho, Sang Young Jeong, Han Young Woo, Sae Byeok Jo, Sunil V. Barma, Jung Woo Moon, Jinho Keum
article en
4 citations

Abstract

This study demonstrates multithreshold engineering of a solution-processed heterojunction electrochemical transistor using a blend of n-type CdSe tetrapod-shaped nanocrystals (TpNCs) and an n-type polymeric organic semiconductor (OSC). The unique geometry of TpNCs enables a broad concentration range of charge percolation, where charge transfer between TpNC and OSC domains determines multiple threshold voltages. The OSC domain’s threshold voltage shifts from 1 to −1 V as TpNC content increases, while the TpNC domain maintains a threshold above 1.5 V. This allows for stable intermediate states, crucial for multivalued logic operations. Charge percolation and photoluminescence studies show selective charge redistribution, shifting the threshold voltages in the polymer networks. Ternary logic gates, including TNOT, TNAND, and TNOR, based on these heterojunction transistors, were also demonstrated, highlighting the potential of this approach for advanced logic applications.

npj Flexible ElectronicsVol. 8(1)
Sogang University (KR), Yonsei University (KR), Korea University (KR), Sookmyung Women's University (KR), Chung-Ang University (KR), Sungkyunkwan University (KR)
National Research Foundation, National Research Foundation of Korea, Ministry of Science and ICT, South Korea
Affordable and clean energy
Openalex Percentile: Top 26%
Advanced Memory and Neural Computing
0.83
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.