FPGA-Based High-Performance Network Impairment Emulator

With the rapid growth of Wide Area Networks (WANs) and advancements in 5G, cloud computing, and IoT, networks face higher demands for low cost, high capacity, reliability, and security. To ensure these requirements, network impairment emulators have become essential tools for testing and optimizing network performance under various conditions. This paper presents an FPGA-based Network Impairment Emulator (FNIE) that accurately emulates packet loss, reordering, and delay with high throughput and low cost. FNIE can achieve up to 100 Gbps throughput, with a configurable packet loss rate ranging from 0.001% to 100%, with a resolution as fine as 0.001%. It also supports up to 64 descriptor queues for reordering, a maximum reordering extent of 511, and emulates delays from 1 µs to 1 s.

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Publication Details

Journal
Electronics
Published
2024-12-19
DOI
https://doi.org/10.3390/electronics13244998
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
0.00

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article

FPGA-Based High-Performance Network Impairment Emulator

Dong Duan, Lei Liu, Lin Li, Xinshuo Wang
Electronics
Embedded Systems Design Techniques
article

FPGA-Based High-Performance Network Impairment Emulator

Dong Duan, Lei Liu, Lin Li, Xinshuo Wang
article en

Abstract

With the rapid growth of Wide Area Networks (WANs) and advancements in 5G, cloud computing, and IoT, networks face higher demands for low cost, high capacity, reliability, and security. To ensure these requirements, network impairment emulators have become essential tools for testing and optimizing network performance under various conditions. This paper presents an FPGA-based Network Impairment Emulator (FNIE) that accurately emulates packet loss, reordering, and delay with high throughput and low cost. FNIE can achieve up to 100 Gbps throughput, with a configurable packet loss rate ranging from 0.001% to 100%, with a resolution as fine as 0.001%. It also supports up to 64 descriptor queues for reordering, a maximum reordering extent of 511, and emulates delays from 1 µs to 1 s.

ElectronicsVol. 13(24)
Chinese Academy of Sciences (CN), Institute of Acoustics (CN), University of Chinese Academy of Sciences (CN)
Chinese Academy of Sciences, Institute of Acoustics, Chinese Academy of Sciences
Industry, innovation and infrastructure
Openalex Percentile: Top 75%
Embedded Systems Design Techniques
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FPGA-Based High-Performance Network Impairment Emulator — Dong Duan, Lei Liu, et al. · Electronics (2024) | TGRS Research Map | TGRS