FPGA-Based High-Performance Network Impairment Emulator
With the rapid growth of Wide Area Networks (WANs) and advancements in 5G, cloud computing, and IoT, networks face higher demands for low cost, high capacity, reliability, and security. To ensure these requirements, network impairment emulators have become essential tools for testing and optimizing network performance under various conditions. This paper presents an FPGA-based Network Impairment Emulator (FNIE) that accurately emulates packet loss, reordering, and delay with high throughput and low cost. FNIE can achieve up to 100 Gbps throughput, with a configurable packet loss rate ranging from 0.001% to 100%, with a resolution as fine as 0.001%. It also supports up to 64 descriptor queues for reordering, a maximum reordering extent of 511, and emulates delays from 1 µs to 1 s.
Authors
- Dong Duan (ORCID: https://orcid.org/0000-0001-7092-432X)
- Lei Liu (ORCID: https://orcid.org/0000-0003-4854-7382)
- Lin Li (ORCID: https://orcid.org/0000-0002-1970-1478)
- Xinshuo Wang (ORCID: https://orcid.org/0009-0006-3658-779X)
Institutions
- Chinese Academy of Sciences (CN)
- Institute of Acoustics (CN)
- University of Chinese Academy of Sciences (CN)
Publication Details
- Journal
- Electronics
- Published
- 2024-12-19
- DOI
- https://doi.org/10.3390/electronics13244998
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Chinese Academy of Sciences
- Institute of Acoustics, Chinese Academy of Sciences