Current Prediction-Based Pulsewidth Compensation Considering Switch Parasitic Capacitance for High-Frequency Cascaded Transformer Multilevel Inverters

Distorted pulsewidth in high-frequency cascaded transformer multilevel inverters (CTMIs) introduces significant low-order harmonics causing electromagnetic interference (EMI) problems, which need compensation. However, if compensation considers only the dead time and ignores the switch parasitic capacitance, harmonics will increase, especially at a small output current. Besides, conventional methods based on current sampling are often disturbed by sampling errors and communication delays. For the effective suppression of low-order harmonics in high-frequency CTMIs, this article analyzes the trapezoidal voltage edge caused by switch parasitic capacitance and proposes a current prediction-based pulsewidth compensation method. The submodule (SM) current in CTMIs is predicted by iteration considering the switch parasitic capacitance effect. The transformer excitation current is also added. With the predicted current, the distorted SM pulsewidth caused by switch parasitic capacitance, dead time, and switching delay times is accurately compensated. The proposed method eliminates the current sampling and communication delay. Compared with conventional methods, the proposed method provides better low-order harmonic suppression. The third and fifth harmonics are effectively suppressed to less than 0.10% of the fundamental. The proposed method is validated by simulation and experiments in a 17-level CTMI with a 30 kHz fundamental frequency.