Optimal reliable constraints-based design space exploration in VLSI for power grid design

The task of developing a power grid network (PGN) for a VLSI device is challenging because of the increase in network complexity. The PGN's metallic line resistances result in voltage dips called IR drops, which can change the voltage level of simple logic circuits and lead to system-on-chip (SoC) malfunction. Numerous reliability restrictions also have an impact on the IR drop, and breaking any of those rules might make the IR drop considerably worse. Hence, as it does not require any modifications to the grid's structure, the implementation of longer wires is proposed here. Consequently, the process of minimising inductive radiation drop is automated, and as such, the objectives encompass area, voltage drop, and penalty. Additionally, a new optimisation crisis is measured for dependability limitations, and the elephant herding updated whale algorithm (EHU-WA), a combination of the whale optimisation (WOA) and elephant herding optimisation (EHO) algorithms, is developed to solve this.