Junction Temperature Estimation Method for Press-pack IGBTs Using Double-side Thermal Resistance Network Model

Due to the asymmetry of the double-side structure of press-pack insulated-gate bipolar transistors (PP IGBTs), the physical significance and calculation method of parameters in the thermal resistance network model are not clear, which brings some challenges to the junction temperature (Tj) estimation method using this model. In this paper, two kinds of double-side thermal resistance network physical models are proposed by calculating the heat flow ratio on both sides and taking the temperature of the top and bottom case as the reference isothermal point. In the single chip packaging and double-side water cooling conditions, the simulation results show that the maximum relative error of the junction temperature estimation of two kinds of models established and the traditional model is −0.13%, 1.21% and −1.42%, respectively. The experiment also verifies that the proposed model has the highest accuracy and a certain range of application for the junction temperature estimation of PP IGBTs.

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Published
2024-11-08
DOI
https://doi.org/10.1109/isesc63657.2024.10785298
Citations
1
Primary Topic
Silicon Carbide Semiconductor Technologies
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article
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Junction Temperature Estimation Method for Press-pack IGBTs Using Double-side Thermal Resistance Network Model

Kaijun Wen, Ziyang Zhang, Liangcheng Tu, Lin Liang et al.
1 citations
Silicon Carbide Semiconductor Technologies
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article

Junction Temperature Estimation Method for Press-pack IGBTs Using Double-side Thermal Resistance Network Model

Kaijun Wen, Ziyang Zhang, Liangcheng Tu, Lin Liang, Wang Li, Zhiyuan Zhang
article en
1 citations

Abstract

Due to the asymmetry of the double-side structure of press-pack insulated-gate bipolar transistors (PP IGBTs), the physical significance and calculation method of parameters in the thermal resistance network model are not clear, which brings some challenges to the junction temperature (Tj) estimation method using this model. In this paper, two kinds of double-side thermal resistance network physical models are proposed by calculating the heat flow ratio on both sides and taking the temperature of the top and bottom case as the reference isothermal point. In the single chip packaging and double-side water cooling conditions, the simulation results show that the maximum relative error of the junction temperature estimation of two kinds of models established and the traditional model is −0.13%, 1.21% and −1.42%, respectively. The experiment also verifies that the proposed model has the highest accuracy and a certain range of application for the junction temperature estimation of PP IGBTs.

Huazhong University of Science and Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 45%
Silicon Carbide Semiconductor Technologies
0.21
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