Impedance Compression Network Design for VHF Class E Inverters

This paper proposes an innovative impedance compression network design method to effectively compress circular load impedance regions without altering the operating frequency, employing adjustable components, or modifying the phase difference. This approach ensures that very high frequency inverters maintain ZVS operation despite load impedance variations. By analyzing passive lossless two-port networks using transmission parameter matrices and the image method, the paper demonstrates the transformation process of circular load impedance regions. When combined with the finite input inductance Class E inverter design, this method further extends the ZVS region. The prototype confirms the theoretical analysis and demonstrate the method's effectiveness in practical applications.