Research on Second Harmonic Current Suppression for Quasi-Z-Source Inverter Based on Fractional-Order Decupling Circuit

The quasi-Z-source inverter integrates inversion and step-up function in one stage, which is attractive for photovoltaic power generation, while usually requiring a large impedance network to suppress low-order harmonic currents on the DC side. In this paper, a fractional-order decoupling circuit is introduced on the conventional quasi-Z-source inverter in parallel with the DC bus, and only a small decoupling capacitance and inductance are needed to suppress second harmonic current. The decoupling circuit consists of one inductor, two capacitors and three switches, with control strategy to obtain the zero impedance at the doubled line frequency. The pulsating power only flows between the DC side of the inverter and the harmonic suppression branch, and has no influence on the inverter. Finally, the proposed scheme is verified by simulation and experiment on a prototype with 120Vdc input, and 140Vrms/50Hz output. The experimental results show that the input inductor current ripple is reduced from 9.4A to 4.4A, and the sum of the voltage ripple of the two capacitors in the impedance network is reduced from 82.0V to 16.1V.

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Published
2024-11-08
DOI
https://doi.org/10.1109/isesc63657.2024.10785512
Primary Topic
Multilevel Inverters and Converters
Type
article
Field-Weighted Citation Impact
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article

Research on Second Harmonic Current Suppression for Quasi-Z-Source Inverter Based on Fractional-Order Decupling Circuit

Yanhua Hong, Hai Huang, Qiang Zhang, Junlong Chen
Multilevel Inverters and Converters
article

Research on Second Harmonic Current Suppression for Quasi-Z-Source Inverter Based on Fractional-Order Decupling Circuit

Yanhua Hong, Hai Huang, Qiang Zhang, Junlong Chen
article en

Abstract

The quasi-Z-source inverter integrates inversion and step-up function in one stage, which is attractive for photovoltaic power generation, while usually requiring a large impedance network to suppress low-order harmonic currents on the DC side. In this paper, a fractional-order decoupling circuit is introduced on the conventional quasi-Z-source inverter in parallel with the DC bus, and only a small decoupling capacitance and inductance are needed to suppress second harmonic current. The decoupling circuit consists of one inductor, two capacitors and three switches, with control strategy to obtain the zero impedance at the doubled line frequency. The pulsating power only flows between the DC side of the inverter and the harmonic suppression branch, and has no influence on the inverter. Finally, the proposed scheme is verified by simulation and experiment on a prototype with 120Vdc input, and 140Vrms/50Hz output. The experimental results show that the input inductor current ripple is reduced from 9.4A to 4.4A, and the sum of the voltage ripple of the two capacitors in the impedance network is reduced from 82.0V to 16.1V.

Xiamen University of Technology (CN)
Natural Science Foundation of Fujian Province
Affordable and clean energy
Openalex Percentile: Top 79%
Multilevel Inverters and Converters
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