ChiPICA: Chiplet Physical Inspection Certification Authority for Trust Verification in Heterogeneous Integration

Heterogeneous Integration (HI) of chiplets offers diverse functionalities and enhanced performance within compact packaging by assembling chiplets sourced from different foundries into one substrate via 2.5D/3D advanced packaging techniques. However, an adversarial foundry, with complete access to the chiplet layout and test vectors, could maliciously modify the design with hardware Trojans, compromising the security of the System-in-Package (SiP). In this paper, we introduce the Chiplet Physical Inspection Certification Authority (ChiPICA) to ensure the trustworthiness of chiplets by validating Scanning Electron Microscopy (SEM) images of the chiplet’s backside against the layout of the active layer on individual logic cells using Fourier Shape Descriptor-based shape matching. Additionally, the proposed framework only requires the design house to provide shape descriptor values for individual logic cells in the form of a shape packet list, which protects the intellectual property of the chiplet designer. A fast verification algorithm that operates on the shape packet list, along with a pipelined implementation that achieves an average speed up of approximately 6.5x compared to previous method is also proposed in this paper.

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Publication Details

Published
2024-11-12
DOI
https://doi.org/10.1109/paine62042.2024.10792842
Citations
1
Primary Topic
Electrostatic Discharge in Electronics
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article
Field-Weighted Citation Impact
0.21
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article

ChiPICA: Chiplet Physical Inspection Certification Authority for Trust Verification in Heterogeneous Integration

Farimah Farahmandi, Nitin Varshney, Mohammad Bin Monjil, Navid Asadi Zanjani et al.
1 citations
Electrostatic Discharge in Electronics
0.21
article

ChiPICA: Chiplet Physical Inspection Certification Authority for Trust Verification in Heterogeneous Integration

Farimah Farahmandi, Nitin Varshney, Mohammad Bin Monjil, Navid Asadi Zanjani, Jingbo Zhou, Mark Tehranipoor
article en
1 citations

Abstract

Heterogeneous Integration (HI) of chiplets offers diverse functionalities and enhanced performance within compact packaging by assembling chiplets sourced from different foundries into one substrate via 2.5D/3D advanced packaging techniques. However, an adversarial foundry, with complete access to the chiplet layout and test vectors, could maliciously modify the design with hardware Trojans, compromising the security of the System-in-Package (SiP). In this paper, we introduce the Chiplet Physical Inspection Certification Authority (ChiPICA) to ensure the trustworthiness of chiplets by validating Scanning Electron Microscopy (SEM) images of the chiplet’s backside against the layout of the active layer on individual logic cells using Fourier Shape Descriptor-based shape matching. Additionally, the proposed framework only requires the design house to provide shape descriptor values for individual logic cells in the form of a shape packet list, which protects the intellectual property of the chiplet designer. A fast verification algorithm that operates on the shape packet list, along with a pipelined implementation that achieves an average speed up of approximately 6.5x compared to previous method is also proposed in this paper.

University of Florida (US)
Openalex Percentile: Top 45%
Electrostatic Discharge in Electronics
0.21
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