Integrated Testing Framework for μDMA Peripherals
This paper presents a thorough examination of micro DMA (μDMA) functionality within an integrated test environment incorporating Advanced Peripheral Bus (APB) Bus Functional Model (BFM) and Random Access Memory (RAM). The study focuses on the utilization of APB BFM to configure μDMA and the subsequent interaction with RAM for data read and write operations. Initially, the configuration of μDMA through APB BFM sets the groundwork for data exchange. Subsequently, RAM serves as the intermediary for data transactions, facilitating efficient data transfer in μDMA. The experimental findings provide valuable insights into the performance and reliability of μDMA within this integrated framework, highlighting its potential applications in communication protocols.
Authors
- V R Adersh
- Tiwari Aditya
- Akza Baby
Institutions
- University of Kerala (IN)
Publication Details
- Published
- 2024-09-20
- DOI
- https://doi.org/10.1109/spices62143.2024.10779696
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00