IR-UWB Synthesizer based on a Non-Uniformly Sampled Envelope for High Side-lobes Rejection

In this paper, an Impulse Radio Ultra-wide band (IR-UWB) synthesizer aiming to cover all IEEE 802.15.4 and 802.15.6 standards channels within the 3.1 – 10.6 GHz frequency band is presented. Its architecture is based on the frequency transposition of a non-uniformly sampled envelope, which allows synthesizer design complexity to be reduced without compromising the side-lobes rejection. The synthesizer has a voltage supply of 0.9V and occupies a surface of 0.26 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. It has been implemented using the TSMC CMOS 28nm technology. Post-layout simulations have been performed to validate its performances. Compared to the state-of-the-art, the proposed circuit, which has an output voltage of 0.9 Vpp, is the only one with the potential to cover all IEEE standardized channels.

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Published
2024-10-14
DOI
https://doi.org/10.1109/dttis62212.2024.10780347
Primary Topic
Ultra-Wideband Communications Technology
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article
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article

IR-UWB Synthesizer based on a Non-Uniformly Sampled Envelope for High Side-lobes Rejection

Felipe Artemio Schoulten, André Mariano, R. Vauché, Sylvain Bourdel et al.
2 links
Ultra-Wideband Communications Technology
article

IR-UWB Synthesizer based on a Non-Uniformly Sampled Envelope for High Side-lobes Rejection

Felipe Artemio Schoulten, André Mariano, R. Vauché, Sylvain Bourdel, J. Gaubert
article en

Abstract

In this paper, an Impulse Radio Ultra-wide band (IR-UWB) synthesizer aiming to cover all IEEE 802.15.4 and 802.15.6 standards channels within the 3.1 – 10.6 GHz frequency band is presented. Its architecture is based on the frequency transposition of a non-uniformly sampled envelope, which allows synthesizer design complexity to be reduced without compromising the side-lobes rejection. The synthesizer has a voltage supply of 0.9V and occupies a surface of 0.26 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. It has been implemented using the TSMC CMOS 28nm technology. Post-layout simulations have been performed to validate its performances. Compared to the state-of-the-art, the proposed circuit, which has an output voltage of 0.9 Vpp, is the only one with the potential to cover all IEEE standardized channels.

Institut polytechnique de Grenoble (FR), Centre National de la Recherche Scientifique (FR), Université de Toulon (FR), Institut des Matériaux, de Microélectronique et des Nanosciences de Provence (FR), Universidade Federal do Pará (BR)
Openalex Percentile: Top 79%
Ultra-Wideband Communications Technology
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IR-UWB Synthesizer based on a Non-Uniformly Sampled Envelope for High Side-lobes Rejection — Felipe Artemio Schoulten, André Mariano, et al. · (2024) | TGRS Research Map | TGRS