IJTAG-compatible Symptom-based SEU Monitors for FPGA DNN Accelerators

The increase in complexity of Machine Learning (ML) algorithms, specifically Deep Neural Networks (DNN), and the high demand to deploy them on resource-constrained edge devices require specialized hardware accelerators, such as FPGA-based ones. However, FPGAs are susceptible to radiation-induced soft errors that can manifest as an incorrect classification. As ML is used increasingly in safety-and mission-critical applications, fault tolerance of DNN accelerators comes to the front. This paper presents a cost-efficient fault tolerance solution for FPGA DNN accelerators using online symptom-based monitors for multipliers (DSPs) that observe higher-order bits of the inputs and outputs to detect out-of-range values. The monitors can detect soft errors in the datapath and parameter buffers and are compatible with an IJTAG-based fault management infrastructure. The proposed method covers up to 99% of the classification errors in a 16-bit case-study network and 53% in an 8-bit network.